Touch screen controller circuits for use in touch screen, touch pad, and touch button applications have generally included digital controller circuitry and analog circuitry for detecting/measuring the presence of capacitance if a user touches a point on a touch screen (or a touch pad or touch button). The presence or movement of a user's finger in the vicinity of the electric field associated with the capacitance of the touch screen, touch button, etc., disturbs or impedes the electric field and therefore modifies the capacitance. The capacitance detecting/measuring circuit therefore indicates the presence of the finger as a change in the modified touch screen or touch button capacitance. The prior art typically utilizes current sourcing/sinking circuitry, RC networks, and counters to provide a digital indication of the measured capacitance, which, in a touch screen controller, can be used to precisely identify/indicate the screen location being touched.
FIG. 1A illustrates part of a touch screen panel 1-1 which includes a suitable number of horizontal transparent conductors 2 disposed on one surface of a thin, transparent insulative layer (not shown). A suitable number of vertical transparent conductors 3 are disposed on the other surface of the insulative layer. The left end of each of the horizontal conductors 2 can be connected to suitable current sourcing or drive circuitry. The bottom end of each of the vertical conductors 3 can be connected to suitable current sinking or receiving circuitry. A cross-coupling capacitance CSENj occurs at an “intersection” of each horizontal conductor such as 2-I and each vertical conductor such as 3-j, the intersection being located directly beneath a “touch point” 13. Note that the touching by a user's finger does not necessarily have to occur directly over a touch point. If multiple touch points 13 are sufficiently close together, then a single touching may disrupt the electric fields of a number of different cross-coupling capacitances CSENj. However, the largest change in the value of a particular cross-coupling capacitance CSENj occurs when the touching occurred directly over that particular cross-coupling capacitance.
FIG. 1B illustrates any particular horizontal conductor 2-I and any particular vertical (as in FIG. 1A) conductor 3-j and the associated cross-coupling capacitance CSENj between them, I and j being row and column index numbers of the horizontal conductors 2 and the vertical conductors 3, respectively. (By way of definition, the structure including the overlapping conductors 2-I and 3-j which result in the cross-coupling capacitance CSENj is referred to as “capacitor CSENj”. That is, the term “CSENj” is used to refer both to the capacitor and its capacitance.)
The drive circuitry for horizontal conductor 2-I can include a drive buffer 12 which receives appropriate pulse signals on its input 4. The output of drive buffer 12 is connected to the right end of conductor 2-I, which is modeled as a series of distributed resistances RA and distributed capacitances CA each connected between ground and a node between two adjacent distributed resistances RA. The receive circuitry for conductor 3-j is illustrated as being connected to the right end of vertical conductor 3-j. A switch S1j is connected between conductor 3-j and VSS. A sampling capacitor CSAMPLE has one terminal connected to conductor 3-j and another terminal connected by conductor 5 to an input of a comparator 6, one terminal of a switch S2j, and one terminal of a resistor RSLOPE. The other terminal of switch S2j is connected to VSS. The other terminal of resistor RSLOPE is connected to the output of a slope drive amplifier 9, the input of which receives a signal SLOPE DRIVE. The other input of comparator 6 is connected to VSS. The output of comparator 6 is connected to an input of a “timer capture register” 7, which can be a counter that, together with resistor RSLOPE and capacitor CSAMPLE, perform the function of generating a digital output signal on bus 14 representing the value of CSENj.
A problem of the above described prior art is that the time required for the capacitance measurement is time-varying in the sense that a lower value of the capacitance CSENj requires less counting time by timer capture register 7, whereas a higher value of the capacitance CSENj requires more counting time by timer capture register 7. The widely variable capacitance measurement times may be inconvenient for a user. Also, the system is quite susceptible to noise because comparator 6 in Prior Art FIG. 1B is connected via CSAMPLE during the entire capacitance measurement process.
A shortcoming of passive capacitance measurement system 15 as shown in FIG. 2A of the co-pending applications is that its sensitivity is limited by the ratio of the measured capacitance CSENj to the CDAC capacitance. The capacitance measurement system shown in FIG. 2A of the co-pending applications can measure a value of CSENj in the range from 0 pF (picofarads) to roughly 30 pF. However, it would be desirable in some applications to provide an improved capacitance measurement system having greater sensitivity, i.e., greater measured capacitance per LSB of DATA<11:0> than can be achieved using the system shown in FIG. 2A of the above-mentioned co-pending applications.
Thus, there is an unmet need for a capacitance measurement system that is capable of making accurate measurements of a broader range of capacitances than the prior art.
There also is an unmet need for an improved digital circuit and method for making touch screen capacitance measurements in a touch screen controller circuit.
There also is an unmet need for an improved digital circuit and method for making touch screen capacitance measurements in a touch button controller circuit.
There also is an unmet need for a digital capacitance measurement system and method having greater capacitance measurement sensitivity than the prior art.
There also is an unmet need for a digital capacitance measurement system and method having greater capacitance per LSB measurement sensitivity than the prior art.
There also is an unmet need for a digital capacitance measurement system and method having greater touch screen capacitance per LSB measurement sensitivity than the prior art and the capacitance measurement system described in the co-pending U.S. patent application Ser. No. 12/381,741 (now U.S. Pat. No. 7,982,471), entitled “CAPACITANCE MEASUREMENT SYSTEM AND METHOD,” filed on Mar. 27, 2009, and U.S. patent application Ser. No. 13/151,712, entitled “CAPACITANCE MEASUREMENT SYSTEM AND METHOD,” filed on Jun. 2, 2011, where each co-pending application is hereby incorporated by reference for all purposes application.
There also is an unmet need for a digital capacitance measurement system and method having the ability to compensate for large parasitic capacitances.
There also is an unmet need for a digital capacitance measurement system and method which is conveniently configurable to provide different precharge strategies to accommodate various parasitic capacitances.